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SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?1?of?24 audio?control?system?with?built-in?4-bit?mcu description the? SC63C0316? single- chip? cmos? microcontroller? is? designed? for very? high? performance.? with? an? up-to-14-digit? lcd direct? drive capability,?4-channel?a/d?converter,?8- bit?timer/counter,?pll?frequency synthesizer.? t he? SC63C0316? offers? you? an? excellent? design? solution for? a? wide? variety? of? applications,? especially those? requiring? dts support. up? to? 56? pins? of? the? 80- pin?qfp? package? can? be? dedicated? to? i/o. eight?vectored?interrupts?provide?fast?response to?internal?and?external events.? in? addition,? the? SC63C0316's? advanced? cmos? technology ensures?low?power?consumption?and?a?wide?operating?voltage?range. features memory * 512-nibble?ram * 16k-byte?rom i/o?pins * input?only:?4?pins * output?only:?28?pins * i/o:?24?pins lcd?controller/driver * maximum?14-digit?lcd?direct?drive?capability * 28?segment?x?4?common?signals * display?modes:?static,?1/2?duty?(1/2?bias) 1/3?duty?(1/2?or?1/3?bias),?1/4?duty?(1/3?bias) 8-bit?basic?timer * programmable?interval?timer?functions * watch-dog?timer?function 8-bit?timer/counter * programmable?8-bit?timer * external?event?counter * arbitrary?clock?frequency?output * external?clock?signal?divider * serial?i/o?interface?clock?generator 8-bit?serial?i/o?interface * 8-bit?transmit/receive?mode * 8-bit?receive?mode * data?direction?selectable?(lsb-first?or?msb-first) * internal?or?external?clock?source qfp-80-14 20-0.8 ordering?information device package SC63C0316 qfp-80-14?x?20-0.8 a/d?converter * 4-channels?with?8-bit?resolution bit?sequential?carrier?buffer * support?16-bit?serial?data?transfer?in arbitrary?format pll?frequency?synthesizer * level?=?300?mvp-p?(min) * amvco?range?=?0.5?mhz?to?30?mhz * fmvco?range?=?30?mhz?to?150?mhz 16-bit?intermediate?frequency?(if) counter * level?=?300?mvp-p?(min) * amif?range?=?100?khz?to?1?mhz * fmif?range?=5mhz?to?15?mhz watch?timer * time?interval?generation 0.5?s,?3.9?ms?at?32.768?khz * frequency?outputs?to?buz?pin * clock?source?generation?for?lcd interrupts * four?internal?vectored?interrupts * four?external?vectored?interrupts * two?quasi-interrupts memory-mapped?i/o?structure * data?memory?bank?15
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?2?of?24 three?power-down?modes * idle:?only?cpu?clock?stops * stop1:?main?system?or?subsystem?clock?stops * stop2:?main?system?and?subsystem?clock?stop * ce?low:?pll?and?ifc?stop oscillation?sources * crystal?or?ceramic?oscillator?for?main?system?clock * crystal?for?subsystem?clock * main?system?clock?frequency:?4.5?mhz?(typ) * subsystem?clock?frequency:?32.768?khz?(typ) * cpu?clock?divider?circuit?(by?4,?8,?or?64) instruction?execution?times * 0.9,?1.8,?14.2 m s?at?4.5?mhz * 122 m s?at?32.768?khz?(subsystem) operating?temperature * ??40 c?to?85 c operating?voltage?range * 1.8?v?to?5.5?v?at?3mhz * pll/ifc?operation:?2.5v?to?3.5v?or 4.0v?to?5.5v applications *?auto?audio?system *?other?audio?system block?diagram absolute?maximum?ratings (t amb =25 c) characteristics symbol value unit supply?voltage v dd -0.3??-??6.5 v v i1 -0.3??-??v dd ?+0.3 input?voltage v i2 -0.3??-??v dd ?+0.3 v output?voltage v o -0.3??-??v dd ?+0.3 v -15 output?current?high i oh -30 ma (to?be?continued)
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?3?of?24 (continued) characteristics symbol value unit +30 ? peak?value ? output?current?low iol +100 ? peak?value ? ma operating?temperature t amb -40?~?85 c storage?temperature t stg -65~150 c dc?characteristics (t amb =-40 c?to?+85 c,?v dd =3.5v?to?6.0v) (to?be?continued) characteristics symbol test?condition min. typ. max. unit v ih1 all? input? pi ns? except? those specified?below?for?vih2-vih4 0.7v dd v dd v ih2 port?0,?1,?6,?7,?and reset 0.8v dd v dd ports? 4,? 5,? 7? and? 8? with? pull- up resistors?assigned 0.7v dd v dd v ih3 ports? 4,? 5,? 7? and? 8? are? open- drain 0.7v dd 9 input?high?voltage v ih4 xin,?xout?and?xtin v dd ?-0.5 --- v dd v v il1 all? input? pins? except? those specified?below?for?cil2-vil3 0.3v dd v il2 ports? 0,? 1,? 6,? 7,? 9,? 10? and reset 0.2v dd input?low?voltage v il3 xin,?xout?and?xtin --- --- 0.4 v v dd =4.5v? to? 6.0v,? i oh =- 1ma, ports?0,?2-10 v dd ?-1.0 v oh1 i oh =-100 m a v dd ?-0.5 v dd =4.5v? to? 6.0v,? i oh =-100 m a, ports?11-13?only v dd ?-2.0 output?high?voltage v oh2 i oh =-30 m a v dd ?-1.0 --- --- v v dd =4.5v? to? 6.0v,? i ol =1.6ma, ports?4,5,7?and?8only 0.8 2 i ol =- 1.6ma,? ports? 0,2,3,6,9,10, eo1,?and?eo2?only 0.4 v ol1 i ol =400 m a,? ports? 0,? 2,? 3,? 6,? 9, 10,?eo1?and?eo2?only 0.2 v dd =4.5v? to? 6.0v,? i ol =100 m a, port?11,?12?and?13?only 1 output?low?voltage v ol2 i ol =50 m a --- --- 1 v input?high?leakage?current i lih1 vi=v dd ,? all? input? pins? except reset ?and? those? specified below?for?ilih2-ilih3 --- --- 3 m a
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?4?of?24 (continued) characteristics symbol test?condition min. typ. max. unit i lih2 v i =v dd ,?xin,?xout,?xtin?only 25 m a input?high?leakage?current i lih3 v i =9v,? ports? 4,5,7? and? 8? are open-drain 20 m a i lil1 v i =0v,? all? input? pins? except? xin, xout,?xtin?and reset -3 input?low?leakage?current i lil2 v i =0v,?xin,?xout,?and?xtin?only --- --- -20 m a i loh1 v o =v dd ,? all? output? pins? except for?ports?4,?5,?7?and?8 3 output? high? leak age current i loh2 v o =9v,?ports?4,?5,?7?and?8?are open-drain --- --- 20 m a output? low? leakage current i lol v o =0v --- --- 3 m a v i =0v;?v dd =5v 10%,? port? 0- 3, 6,?9,?and?10?(except?p1.3) 15 46 80 r l1 v dd =3v 10%, 30 90 200 v o =v dd -2v,?v dd =5v 10%, ports?4,?5,?7?and?8?only 15 40 70 r l2 v dd =3v 10%, 10 60 v i =0v;?v dd =5v 10%, reset 100 230 400 pull-up?resistor r l3 v dd =3v 10%, 200 490 800 k w lcd?drive?voltage v lcd -- ????2.5 vdd v lcd? voltage? dividing resistor r lcd ? -- 50 100 140 k w v dd =5v 10%, 3 6 com?output?impedance r com v dd =3v 10%, --- 10 15 k w v dd =5v 10%, 3 20 seg?output?impedance r seg v dd =3v 10%, --- 10 60 k w i dd1?(2) v dd =5v 10 %,(3),? 4.5mhz crystal? oscillator,? c1=c2=22pf, ce?high;?pll?operates 12 25 idle? mode;? v dd =5v 10%, 4.5mhz? crystal? oscillator,? cpu clock?=fxx/4,?ce?low;?pll?stops. 1.4 1.8 i dd2 v dd =3v 10%,? cpu? clock =fxx/64 --- 0.23 1.0 ma i dd3?(4) v dd =3v 10%,? 32kh z? crystal oscillator,?ce?low;?pll?stops. 25 120 supply?current?(1) i dd4?(5) idle?mode;?v dd =3v 10%,?32khz crystal?oscillator. --- 20 30 m a
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?5?of?24 dc?characteristics ?(concluded)?(t amb =-40 c?to?+85 c,?v dd =2.7v?to?6.0v) notes: 1.?currents?in?the?following?circuits?are?not?included;?on-chip?pull-up?resistors,?output?port?drive?currents,?internal lcd?voltage?dividing?resistors?and?a/d?converter. 2.?idd1?and?idd7?are?guaranteed?in?t amb ?=???20?c?to?+?85?c 3.?data?includes?power?consumption?for?subsystem?clock?oscillation. 4.?for?high-speed?controller?operation,?the?power?control?register?(pcon)?must?be?set?to?0011b. 5.?for?low-speed?controller?operation,?the?power?control?register?(pcon)?must?be?set?to?0000b. 6.?when?the?system?clock?control?register,?scmod,?is?set?to?1001b,?main?system?clock?oscillation?stops?and?the subsystem?clock?is?used. main?system?oscillator?characteristics (t amb =-40 c?to?+85 c,?v dd =2.7v?to?6.0v) oscillator characteristics test?condition min typ max units oscillation?frequency?(1) -- 0.4 -- 5.0 mhz ceramic oscillator stabilization?time?(2) stabilization?occurs?when?v dd ?is equal? to?the?mini?mum?oscillator voltage?range -- -- 4 ms oscillation?frequency?(1) -- 0.4 4.5 6.0 mhz v dd =4.5v~6.0v -- -- 10 crystal oscillator stabilization?(2) v dd =2.7v~4.5v -- -- 30 ms xin?input?frequency?(1) -- 0.4 -- 4.5 mhz external clock xin?input?high?and?low level?width -- 111 -- 1250 ns notes: 1.?oscillation?frequency?and?xin?input?frequency?data?are?for?oscillator?characteristics?only. 2.?stabilization?time?is?the?interval?required?for?oscillator?stabilization?after?a?power-on?occurs,?or?when?stop?mode is?terminated. characteristics symbol test?condition min. typ. max. unit stop?1?mode;?xtin=0v v dd =5v 10%,?cpu?clock=fxx/4, ce?low;?pll?stops 0.6 5 i dd5 v dd =3v 10%,?cpu?clock=fxx/64 0.2 3 m a v dd =5v 10%,?4.5mhz?crystal oscillator,?cpu?clock=fxx/4,?ce low;?pll?stops 4.2 8 i dd6 v dd =3v 10%,?cpu?clock=fxx/64 0.7 1.2 ma supply?current?(cont) i dd7?(2) stop?2?mode;?xtin=0v, v dd =5v 10%,?cpu?clock=fxx/4, ce?low;?pll?stops --- 0.12 2.0 m a
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?6?of?24 subsystem?clock?oscillator?characteristics oscillator characteristics test?condition min typ max units oscillation?frequency(1) -- 32 32.768 35 khz v dd =4.5v~5.5v -- 1.0 2 crystal oscillator? stabilization?time?(2) v dd =1.8v~4.5v -- -- 10 s xtin?input?frequency?(1) -- 32 -- 100 khz external clock xtin?input?high?and?low level?width??(txh,?txl) -- 5 -- 15 m s note:1.?oscillation?frequency?and?xtin?input?frequency?data?are?for?oscillator?characteristics?only. 2.?stabilization?time?is?the?interval?required?for?oscillator?stabilization?after?a?power-on?occurs. pin?configurations 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 68 69 70 71 72 73 74 75 76 77 78 79 80 37 36 35 34 33 32 31 30 29 28 27 26 25 3 1 2 3 4 5 6 7 8 9 10 11 l2 13 14 15 16 17 18 19 p4.1/so p4.2/si p4.3/clo p5.0/adc0 p5.1/adc1 p5.2/adc2 p6.0/ks0 p6.1/ks1 sdat/p6.2/ks2 sclk/p6.3/ks3 v dd /v dd0 v ss /v ss0 x out x in v pp /test xt in xt out reset/reset fmif amif v ss1 vcoam vcofm p2.3 p2.2 p2.1 p2.0 seg27/p13.3 seg26/p13.2 seg25/p13.1 seg24/p13.0 seg23/p12.3 seg22/p12.2 seg21/p12.1 com1 com2 com3 seg0/p7.0 seg1/p7.1 seg2/p7.2 seg3/p7.3 seg4/p8.0 seg5/p8.1 seg6/p8.2 seg7/p8.3 seg8/p9.0 seg9/p9.1 p4.0/sck pi.3/int4 p1.2/int2 p1.0/int0 p1.1/int1 p0.3/buz p0.2/tcl0 p0.1/tclo0 p0.0/btco p3.3 p3.2 p3.1 p3.0 SC63C0316 p5.3/adc3 20 21 22 23 24 bias v lc1 v lc2 com0 v lc0 40 39 38 seg10/p9.2 seg11/p9.3 seg12/p10.0 48 47 46 45 44 43 42 41 seg20/p12.0 seg19/p11.3 seg18/p11.2 seg17/p11.1 seg16/p11.0 seg15/p10.3 seg14/p10.2 seg13/p10.1 65 66 67 ce e0 v dd1
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?7?of?24 pin?description pin?no. symbol description 72 73 74 75 p0.0 p0.1 p0.2 p0.3 4-bit?i/o?port. 1-bit?or?4-bit?read,?write,?and?test?are?possible. pull-up?resistors?can?be?configured?by?software. 76 77 78 79 p1.0 p1.1 p1.2 p1.3 4-bit?input?port. 1-bit?or?4-bit?read?and?test?are?possible. pull-up?resistors?can?be?configured?by?software. 56-59 68-71 p2.0~?p2.3 p3.0~p3.3 4-bit?i/o?ports. 1-bit,?4-bit?or?8-bit?read,?write?and?test?are?possible. pull-up?resistors?can?be?configured?by?software. ports?2?and?3?can?be?paired?to?support?8-bit?data?transfer. 80 1 2 3 p4.0 p4.1 p4.2 p4.3 4-bit?i/o?ports. 1-bit,?4-bit?or?8-bit?read,?write?and?test?are?possible. pull-up?resistors?can?be?configured?by?software. 4 5 6 7 p5.0 p5.1 p5.2 p5.3 ports?4?and?5?can?be?paired?to?support?8-bit?data?transfer. 8 9 10 11 p6.0 p6.1 p6.2 p6.3 4-bit?i/o?port. 1-bit,?4-bit?or?8-bit?read,?write?and?test?are?possible. pull-up?resistors?can?be?configured?by?software. 28 29 30 31 p7.0 p7.1 p7.2 p7.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. 32 33 34 35 p8.0 p8.1 p8.2 p8.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. 36 37 38 39 p9.0 p9.1 p9.2 p9.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. 40 41 42 43 p10.0 p10.1 p10.2 p10.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. (to?be?continued)
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?8?of?24 (continued) pin?no. symbol description 44 45 46 47 p11.0 p11.1 p11.2 p11.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. 48 49 50 51 p12.0 p12.1 p12.2 p12.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. 52 53 54 55 p13.0 p13.1 p13.2 p13.3 1-bit?or?4-bit?output?port. alternatively?used?for?lcd?segment?output. 24-27 com0-com3? common?signal?output?for?lcd?display 20 bias lcd?power?control 21 22 23 vlc0 vlc1 vlc2 lcd?power?supply. voltage?dividing?resistors?are?assignable?by software 12 vdd0 main?power?supply 13 vss0 main?ground 19 reset system?reset?pin 14 15 xout xin crystal,? or? ceramic? oscillator? pin? for? main? system? clock.? (for? external? clock input,?use?xin?and?input?xin?s?reverse?phase?to?xout) 18 17 xtout xtin crystal? oscillator? pin?for?subsystem? clock.?(for? external? clock?input,?use? xtin and?input?xtin?s?reverse?phase?to?xtout) 16 test test?signal?input?(must?be?connected?to?vss?for?normal?operation) 67 ce input?pin?for?checking?device?power. normal?operation?is?high?level?and?pll/ifc?operation?is?stopped?at?low?level. 60 61 vcofm vcoam external?vcofm/am?signal?inputs. 66 eo pll?s?phase?error?output 64 63 fmif amif fm/am?intermediate?frequency?signal?inputs. 65 vdd1 pll/ifc?power?supply 62 vss1 pll/ifc?ground 72 btco basic?timer?overflow?output?signal 73 tclo0 timer/counter?0?clock?output?signal 74 tcl0 external?clock?input?for?timer/counter?0 75 buz 2,4,8? or? 16? khz?frequency? output? for? buzzer? sound? for? 4.19?mhz?main? system clock?or?32.768?khz?subsystem?clock (to?be?continued)
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?9?of?24 (continued) pin?no. symbol description 76 77 int0 int1 external? interrupt.? the? triggering? edges? (rising/falling)? are? selectable.? only int0?is?synchronized?with?system?clock. 78 int2 quasi-interrupt?with?detection?of?rising?edge?signal. 79 int4 external?interrupt?input?with?detection?of?rising?or?falling?edges. 80 sck sio?interface?clock?signal 1 si sio?interface?data?input?signal 2 so sio?interface?data?output?signal 3 clo cpu?clock?output 8-11 ks0-ks3 quasi-interrupt?input?with?falling?edge?detection 4-7 adc0-adc3? adc?input?ports. 28-55 seg0-seg27? lcd?segment?signal?output. function?description interrupts the?SC63C0316?has?four?external?interrupts,? four?internal?interrupts?and?two? quasi-interrupts.? table?1?shows the? conditions?for? interrupt? generation.? the?request?flags?that? allow?these? interrupts?to? be? generated? are? cleared by? hardware? when? the? service? routine? is? vectored.? the? quasi-interrupt's? request? flags? must? be? cleared? by software. figure?1.?interrupt?control?circuit?diagram imod1 imod0 # intb irqb irq4 irq0 irq1 irqs irqt0 int1 ints selector ie2 iew ieif iece iet0 ie1 interrupt??control?unit vector?interrupt generator ime ipr is1 is0 #?=?noise?filtering?circuit @?=?edge?detection?circuit power-down mode?release signal int2 ks0-ks3 int4 int0 ie0 ie4 ieb irqce irqif irqw irq2 @ @ intt0 intce intif intw imod2 note?:?int0?can?release?idle?mode?only?when?fxx/64?is?selected?as?a?asmpling?clock
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?10?of?24 table1.?interrupt?request?flag?conditions?and?priorities interrupt source internal/ external condition?for?irqx?flag?setting interrupt priority request?flag name intb i reference?time?interval?signal?from?basic?timer 1 irqb int4 e both?rising?and?falling?edges?detected?at?int4 1 irq4 int0 e rising?or?falling?edge?detected?at?int0?pin 2 irq0 int1 e rising?or?falling?edge?detected?at?int1?pin 3 irq1 ints i completion?signal?for?serial?transmit-and-receive?or receive-only?operation 4 irqs intt0 i signals?for?tcnt0?and?tref0?retgisters?match 5 irqt0 intce e when?falling?edge?is?detected?at?ce?pin 6 irqce intif i when?gate?closes 7 irqif int2* e rising?edge?detected?at?int2?or?else?a?falling?edge?is detected?at?any?of?the?ks0-ks3?pins -- irq2 intw i time?interval?of?0.5s?or?3.19ms -- irqw *?the?quasi-interrupt?int2?is?only?used?for?testing?incoming?signals. interrupt?enable?flags?(iex) iex?flags,?when?set?to?"1",?enable?specific?interrupt?requests?to?be?serviced.?when?the?interrupt?request?flag?is set? to? "1",? an? interrupt? will? not? be? serviced? until? its? corresponding? iex? flag? is? also? enabled.? the? ipr? register contains?a?global?disable?bit,?ime,?which?disables?all?interrupt?at?once. interrupt?priority each?interrupt? source?can?also?be?individually?programmed?to?high?levels?by?modifying?the?ipr?register.?when is1?=?0?and?is0?=?1,?a?low-priority?interrupt?can?itself?be?interrupted?by?a?high-priority?interrupt,?but?not?by?another low-priority?interrupt. if? you? clear?the?interrupt? status? flags? (is1? and?is0)? to? "0"? in?a?interrupt? service? routine,? a? high-priority?interrupt can? be? interrupted? by? low-priority?interrupt? (multi-level? interrupt).? before? the? ipr?can? be?modified? by? 4-bit? write instructions,?all?interrupts?must?first?be?disabled?by?a?di?instruction. when?all?interrupts?are?low?priority?(the?lower?three?bits?of?the?ipr?register?are?"0"),?the?interrupt?requested?first will?have?high?priority.?therefore,?the?first-requested?interrupt?cannot?be?superseded?by?any?other?interrupt. if? two? or? more?interrupt? requests? are? received?simultaneously,? the? priority?level?is? determined? according?to?the standard?interrupt?priorities,?where?the?default?priority?is?assigned?by?hardware?when?the?lower?three?ipr?bits?= "0". in?this?case,?the?higher-priority?interrupt?request?is?serviced?and?the?other?interrupt?is?inhibited.?then,?when?the high-priority? interrupt? is? returned? from? its? service? routine? by? an? iret? instruction,? the? inhibited? service? routine? is started. table?2.?interrupt?priority?register?settings ipr.2 ipr.1 ipr.0 result?of?ipr?bit?setting 0 0 0 process?all?interrupt?requests?at?default?priority?settings. 0 0 1 intb?and?int4?at?highest?priority. 0 1 0 int0?at?highest?priority. 0 1 1 int1?at?highest?priority. 1 0 0 ints?at?highest?priority. 1 0 1 intt0?at?highest?priority. 1 1 0 intce?at?highest?priority. 1 1 1 intif?at?highest?priority.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?11?of?24 table?3.?default?priorities source default?priority intb,?int4 1 int0 2 int1 3 ints 4 intt0 5 intce 6 intif 7 the? interrupt? controller? can? service? multiple? interrupts? in? two? ways:? as? two-level? interrupts,? where? either? all interrupt? requests? or?only?those? of? highest? priority? are? serviced? (see? figure? 2),? or? as?multi-level? interrupts,? when the? interrupt? service? routine? for? a? lower-priority? request? is? accepted? during? the? execution? of? a? higher? priority routine.?(see?figure?3) figure?2:?two-level?interrupt?handling figure?3:?multi-level?interrupt?handling int?disable set?ipr int?enable low?or high?level interrupt generated low?or high?level interrupt generated single interrupt 2-level interrupt normal?program processing?(status?0) int?disable modify?status int?enable status?0 status?1 3-level interrupt status?2 status?1 high?level interrupt generated status?0 note:? if? more? than? four? interrupts? are? being? processed? at? one? time,? you? can? avoid? possible? loss? of? working register?data?by?using?the?push?rr?instruction?to?save?register?contents?to?the?stack?before?the?service routines?are?executed?in?the?same?register?bank.?when?the?routines?have?executed?successfully,?you?can restore?the?register?contents?from?the?stack?to?working?memory?using?the?pop?instruction.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?12?of?24 interrupt?execute?flowchart a?vectored?interrupt?is?generated?when?the?following?flags?and?register?settings,?corresponding?to?the?specific interrupt?(intn)?are?set?to?logic?one: ? ?interrupt?enable?flag?(iex) ? ?interrupt?master?enable?flag?(ime) ? ?interrupt?request?flag?(irqx) ? ?interrupt?status?flags?(is0,?is1) ? ?interrupt?priority?register?(ipr) if?all?conditions?are?satisfied?for?the?execution?of?a?requested?service?routine,?the?start?address?of?the?interrupt?is loaded?into?the?program?counter?and?the?program?starts?executing?the?service?routine?from?this?address. figure?4?interrupt?execution?flowchart interrupt?is?generated?(int?xx) request?flag?(irqx)?????1 iex=1? generate?corresponding?vector interrupt?and?release?power-down?mode ime=1? is1,0=0,0? is1,0=0,1? high-priorityinterrupt is1,?0=1,?0 store?contents?of?pc?and?psw?in?the?stack?area; set?pc?contens?to?corresponding?vector?address are?both?interrupt?sources?of?shared vector?address?used? reset?corresponding?irqx?flag jump?to?interrupt?start?address retain?value?until?iex=1 no no retain?value?until?ime=1 retain?vaule?until?interrupt service?routine?is?completed is1,?0=0,?1 irqx?flag?vaule?remains?1 jump?to?interrupt?start?address verify?interrupt?source?and?clear irqx?with?a?btstz?instruction yes yes no no no yes yes yes yes no
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?13?of?24 external?interrupts the?external?interrupt?mode?registers?imod0?and?imod1?are?used?to? control?the?triggering?edge?of? the?input signal?at?int0?and?int1,?respectively.?the?int4?interrupt?is?an?exception?because?its?input?signal?generates?an interrupt?request?on?both?rising?and?falling?edges. when? a? sampling? clock? rate? of? fxx/64? is? used? for? int0,? an? interrupt? request? flag? must? be? cleared? before? 16 machine?cycles?have?elapsed.?since?the?int0?pin?has?a?clock-driven?noise?filtering?circuit?built?into?it,?please?take the?following?precautions?when?you?use?it: ? ???to?trigger?an?interrupt,?the?input?signal?width?at?int0?must?be?at?least?two?times?wider?than?the?pulse?width?of the?clock?selected?by?imod0.?this?is?true?even?when?the?int0?pin?is?used?for?general-purpose?input. ? ??because?the?int0?input?sampling?clock?does?not?operate?during?stop?or?idle?mode,?you?cannot?use?int0?to release?power-down?mode. external?interrupt?mode?register the?external?interrupt?2?(int2)?mode?register,?imod2,?is?used?to?select?int2?and?ksn?pins?as?interrupt?input.?if a?rising?edge?is?detected?at?the?int2?pin,?or?when?a?falling?edge?is?detected?at?any?one?of?the?pins?(ks0?ks3), the?irq2?flag?is?set?to?"1"?and?a?release?signal?for?power-down?mode?is?generated. if? one? or? more? of? the? pins? which? are? configured? as? key? interrupt? (ks0?ks7)? are? in? low? input? or? low? output state,?the?key?interrupt?can?not?be?occured. figure?5. rising?edge?detection?circuit imod2 falling?edge detection circuit clock selector irq2 int2 p6.3/ks3 p6.2/ks2 p6.1/ks1 p6.0/ks0 note:?to?generate?a?key?interrupt?on?a?falling?edge?at?ks0-ks3,?all ???????????ks0-ks3?pins?must?be?configured?to?input?mode. i/o?ports the?SC63C0316?has?14?ports.?there?are?total?of?4?input?pins,?28?output?pins,?16?configurable?i/o?pins,?and?8 nchannel?open-drain?i/o?pins,?for?a?maximum?number?of?56?i/o?pins. pin?addresses?for?all?ports?except?ports?7-13?are?mapped?in?bank?15?of?the?ram.?ports?7-13?pin?addresses?are in?bank?1?of?the?ram.? the?contents? of?i/o?port?pin?latches?can?be?read,?written,? or?tested?at?the?corresponding address?using?bit?manipulation?instructions.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?14?of?24 port?mode?flags?(pm?flags) port? mode? flags? (pm)? are? used? to? configure? i/o? ports? to? input? or? output? mode? by? setting? or? clearing? the corresponding?i/o?buffer.?if?a?pm?bit?is?"0",?the?corresponding?i/o?pin?is?set?to?input?mode.?if?the?pm?bit?is?"1",?the pin?is?set?to?output?mode.?pm?flags?are?addressable?by?8-bit?write?instructions?only. pull-up?resistor?mode?register?(pumod) the? pull-up? resistor? mode? register,? pumod,? is? an? 8-bit? register? used? to? assign? internal? pull-up? resistors? by software?to?specific?i/o?ports.?when?a?pumod?bit?is?"1",?a?pull-up?resistor?is?assigned?to?the?corresponding?i/o port:? ?when? a? configurable? i/o? port? pin? is? used? as? an? output? pin,? its? assigned? pull-up? resistor? is? automatically disabled,?even?though?the?pin's?pull-up?is?enabled?by?a?corresponding?pumod?bit?setting. pumod? is? addressable? by? 8-bit? write? instructions? only.? a? system? reset? clears? pumod? values? to? logic? zero, automatically?disconnecting?all?software-assignable?port?pull-up?resistors. table?4.?pull-up?resistor?mode?register?(pumod)?organization pumod?id address bit3 bit2 bit1 bit0 fdch pur3 pur2 pur1 pur0 pumod fddh "0" pur6 pur5 pur4 ?table?5.?port?mode?group?flags?(8-bit?w) pm?group?id address bit3/7 bit2/6 bit1/5 bit0/4 fe6h pm0.3 pm0.2 pm0.1 pm0.0 pmg0 fe7h ?0? ?0? ?0? ?0? fe8h pm2.3 pm2.2 pm2.1 pm2.0 pmg1 fe9h pm3.3 pm3.2 pm3.1 pm3.0 feah pm4.3 pm4.2 pm4.1 pm4.0 pmg2 febh pm5.3 pm5.2 pm5.1 pm5.0 fech pm6.3 pm6.2 pm6.1 pm6.0 pmg3 fedh ?0? ?0? ?0? ?0? n-channel?open-drain?mode?register(pne) the? n-channel,? open-drain? mode? register,? pne,? is? used? to? configure? port? 7? to? 13? to? n-channel? open-drain modes?or?push-pull?modes. when?a?bit?in?the?pne?register?is?set?to??1?,?the?corresponding?output?pin?is?configured?to?n-channel?open-drain; when?set?to??0?,?the?output?pin?is?configured?to?push-pull?mode. the? pne? register? consists? of? an? 8-bit? register,? as? shown? below,? pne? can? be? addressed? by? 8-bit? write instructions?only. table?6.?n-channel?open?drain?mode?register?(pne)?setting id address bit?3/7 bit?2/6 bit1/5 bit0/4 fd6h pne10 pne9 pne8 pne7 pne fd7h ?0? pne13 pne12 pne11
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?15?of?24 a/d?converter to?operate?the?a/d?converter,?one?of?the?four?analog?input?channels?is?selected?by?writing?the?appropriate?value to?the?adc?mode?register. to?start?the?converter,?the?adstr?flag?in?the?control?register?aflag?must?be?set?to?"1".?conversion?speed?is determined? by? the? oscillator? frequency? and? the? cpu? clock.? when? the? a/d? operation? is? complete,? the? eoc? flag must? be?tested?in? order?to? verify?that? the? conversion? was? successful.?when?the? eoc? value?is? "0",? the? converted digital?values?stored?in??the?data?register?adata?can?be?read. figure?6.?a/d?converter?circuit?diagram data?bus admod "0" .2 .1 .0 adstr eoc "0" "0" adata aflag mulriplexer ad3 ad2 ad1 ad0 successive approximation logic resistor?string digital-to-analog?converter cmp vain vda 8 dac av ref av ss 8 figure?7.?a/d?converter?timing?diagram tinit tconv?=?10?x?8/fx one?machine?cycle adstr eoc adata previous value value?remains?undetermined valid data adc?digital-to-analog?converter?(dac) the?8-bit?digital-to-analog?converter?(dac)?generates?analog?voltage?reference?values?for?the?comparator. the?dac?is?a?256-step?resistor?string?type?digital-to-analog?converter?that?uses?successive?approximation?logic to? convert? digital? input? into? the? reference? analog? voltage,? vda.? the? vda? values? are? input? from? the? dac? to? the comparator? where? they? are? compared? to? the?multiplexed? external? analog?source? voltage,? vain.? since? the? dac has?8-bit?resolution,?it?generates?the?256-step?analog?reference?voltage.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?16?of?24 adc?data?register?(adata) the?a/d?converter?data?register,?adata,?is?an?8-bit?register?in?which?digital?data?values?are?stored?as?an?a/d conversion? operation? is? completed.? digital? values? stored? in? adata? are? retained? until? another? conversion operation?is?initiated.?adata?is?addressable?by?8-bit?read?instructions?only. adc?mode?register?(admod) the? analog-to-digital?converter? mode?register,? admod,? is?used? to? select? one?of?four? analog? channels?as? the analog?data?input?source.?bit?3?in?the?admod?register?is?always?"0". table?7.?a/d?converter?mode?register?settings?(1,?4-bit?r/w) admod.2 admod.1 admod.0 effect?of?admod?bit?setting 1 0 0 select?input?channel?ad0 0 0 1 select?input?channel?ad1 0 1 0 select?input?channel?ad2 0 1 1 select?input?channel?ad3 note:?if?admod.2?admod.0?=?0,?disable?analog?input?channel?selection. pll?frequency?synthesizer the?phase?locked?loop?(pll)? frequency? synthesizer? locks?medium?frequency? (mf),? high?frequency? (hf),?and very?high?frequency?(vhf)?signals?to?a?fixed?frequency?using?a?phase?difference?comparison?system. figure?8.?pll?frequency?synthesizer?block?diagram plmod input circuit v cofm input circuit v coam prescaler swallow counter plld(16-bit) plmod.3,2 2 nf 1 4 12 4 8 selector programmable counter phase comparator charge pump reference?frequency generator unlock detector ulfg pllref eo 4 plmod.2 plmod.3 pll?frequency?synthesizer?functions the? pll? frequency? synthesizer? divides? the? signal? frequency? at? the? vcoam? or? vcofm? pin? using? the programmable? divider.? it? then? outputs? the? phase? difference? between? the? divided? frequency? and? reference frequency?at?the?eo?pins. note the? pll?frequency? synthesizer? operates? only? when?the? ce?pin?is? high? level;? it? enters? the? disable?mode? when the?ce?pin?is?low.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?17?of?24 phase?detector,?charge?pump,?and?unlock?detector the? phase? comparator? compares? the? phase? difference? between? divided? frequency? (fn)? output? from? the programmable?divider?and?the?reference?frequency?(fr)?output?from?the?reference?frequency?generator. the? charge? pump? outputs? the? phase? comparator's?output?from? error? output? pins? eo.? the? relation? between? the error?output?pin?output,?divided?frequency?fn,?and?reference?frequency?fr?is?shown?below: fr?>?f n =?low?level?output fr?SC63C0316?uses?an?intermediate?frequency?counter?(ifc)?to?count?the?frequency?of?the?am?or?fm?signal at?fmif?or?amif?pin.?the?ifc?block?consists?of?a?1/2?divider,?gate?control?circuit,?ifc?mode?register?(ifmod)?and a?16-bit?binary?counter. during?gate?time,?the?16-bit?ifc?counts?the?input?frequency?at?the?fmif? or?amif?pins.? the?fmif?or?amif? pin input?signal?for?the?16-bit?counter?is?selected?by?ifmod?register.?the?16-bit?binary?counter?(ifcnt1?ifcnt0)?can be?read?by?8-bit?ram?control?instructions?only. when? the? fmif? pin? input? signal? is? selected,? the? signal? is? divided? by? 2.? when? the? amif? pin? input? signal? is directly?connected?to?the?ifc,?it?is?not?divided. by?setting?the?ifmod?register,?the?gate?is?opened?for?1-ms,?4-ms,?or?8-ms?periods.?during?the?open?period?of the? gate,? input? frequency? is? counted? by? the? 16-bit? counter.? when? the? gate? is? closed,? the? counting? operation? is complete,?and?an?interrupt?is?generated.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?18?of?24 figure?9.?if?counter?block?diagram 1/2 divider selector gate control circuit 3 2 1 data?bus fmif 0 gate?signal generator if?counter (16?bit) data?bus 8 1?ms 4?ms 8?ms ifmod amif 1khz?internal?signal table?8.?if?counter?frequency?ranges pin voltage?level frequency?range amif 300mvpp(min) 0.1mhz?to?1mhz fmif 300mvpp(min) 5mhz?to?15mhz input?pin?configuration the? amif? and? fmif? pins? have? built-in? ac? amplifiers? (see? figure? 32).? the? dc? component? of? the? input? signal must?be?stripped?off?by?the?external?capacitor.?when?the?amif?or? fmif?pin?is?selected?for?the?ifc?function?and the?switch?is?turned?on?voltage?of?each?pin?increases?to?approximately?1/2?vdd?after?sufficiently?long?time.?if? the pin?voltage?does?not?increase?to?approximately?1/2?vdd?,?the?ac?amplifier?exceeds?its?operating?range,?possibly causing? an? ifc? malfunction.? to? prevent? this? from? occurring,? you? should? program? a? sufficiently? long? time? delay interval?before?starting?the?count?operation. figure?10.?amif?and?fmif?pin?configuration external frequency fmif amif sw to?internal counter lcd?controller/driver the? SC63C0316?microcontroller? can?directly? drive? 4? com? x?28-segment? lcd? panel.? data? written?to? the? lcd display?ram?can?be?transferred?to?the?segment?signal?pins?automatically?without?program?control. when? a? subsystem? clock? is? selected? as? the? lcd? clock? source,? the? lcd? display? is? enabled? even? during? the stop1?and?idle?power-down?modes. lcd?ram?address?area ram?addresses?1e4h?1ffh?are?used?as?lcd?data?memory.?these?locations?can?be?addressed?by?1-bit?or?4- bit?instructions.?when?the?bit?value?of?a?display?segment?is?"1",?the?lcd?display?is?turned?on;?when?the?bit?value?is "0",?the?display?is?turned?off. display? ram? data? are? sent? out? through? segment? pins? seg0?seg27? using? a? direct? memory? access? (dma)
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?19?of?24 method?that?is?synchronized?with?the?flcd?signal. ram?addresses?in?this?location??that?are?not?used?for?lcd?display?can?be?allocated?to?general-purpose?use. figure?11.?lcd?display?data?ram?organization bit3 bit2 bit1 bit0 ...... ...... ...... ...... 1e4h 1e5h 1f8h 1f9h 1fah 1fbh 1fch 1fdh 1feh 1ffh com3 com2 com1 com0 seg0 seg1 seg24 seg25 seg26 seg27 seg20 seg21 seg22 seg23 figure?12.?lcd?circuit?diaram 1ffh.3 1ffh.2 1ffh.1 1ffh.0 1f4h.3 1f4h.2 1f4h.1 1f4h.0 ff7h.3 ff7h.2 ff7h.1 ff7h.0 lpot lmod m u x m u x s e l s e l p o r t / s e g m e n t d r i v e r timing controller com control lcd voltage control f lcd 4 4 4 8 4 seg27/p13.3 seg1/p7.1 bias com3 com2 com1 com0 v lc0 v lc1 v lc2 1f4h.3 1f4h.2 1f4h.1 1f4h.0 4 m u x s e l fffh.3 fffh.2 fffh.1 fffh.0 4 lcon 4 seg0/p7.0
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?20?of?24 lcd?control?register?(lcon) the? lcon? register? is? used? to? turn? the? lcd? display? on? and? off? and? to? control? the? flow? of? current? to? dividing resistors? in? the? lcd? circuit.? when? lcon.0? is? logic? zero,? the? lcd? display? is? turned? off? and? the? current? to? the dividing?resistors?is?cut?off,?regardless?of?the?current?lmod.3?value. table?9.?lcd?control?register?(lcon)?organization?(4-bit?w) lcon?bit setting description lcon.3 0 always?set?to?logic?zero. lcon.2 0 always?set?to?logic?zero. 0 port?6?input?enable lcon.1 1 port?6?input?disable 0 lcd?output?low,?cut?off?current?to?dividing?resistor lcon.0 1 when?lmod.3=?0?:?turn?display?off. when?lmod.3=?1?:?com?and?seg?output?in?display?mode. table?10?relationship?of?lcon.0?and?lmod.3?bit?settings lcon.0 lmod.3 com0?com3 seg0?seg31 p11.0?p13.3 0 x output?low;?lcd?display?off output?low;?lcd?display?off lcd? display? off? ,? cut? off current?to?dividing?resistors 0 lcd?display?off lcd?display?off lcd?display?off 1 1 com? output? corresponds to?display?mode seg?output?corresponds?to display?mode lcd?display?on note:'x'?means?'don't?care.' lcd?mode?register?(lmod) the?lcd?mode?control?register?lmod?is?used?to?control?display?mode;?lcd?clock,?segment?or?port?output,?and display? on/off.? the? lcd? clock? signal,? lcdck,? determines? the? frequency? of? com? signal? scanning? of? each segment?output.?this?is?also?referred?to?as?the?'frame?frequency. because?lcdck?is?generated?by?dividing?the?watch?timer? clock?(fw),?the?watch?timer?must?be?enabled?when the? lcd? display? is? turned? on.? the? lcd? display? can? continue? to? operate? during? idle? and? stop? modes? if? a subsystem?clock?is?used?as?the?watch?timer?source. table?11.?lcd?clock?signal?(lcdck)?frame?frequency lcdck?frequency static 1/2?duty 1/3?duty 1/4?duty fw/2 9 (64hz) 64 32 21 16 fw/2 8 (128hz) 128 64 43 32 fw/2 7 (256hz) 256 128 85 64 fw/2 6 (512hz) 512 256 171 128 notes:?'fw'?is?the?watch?timer?clock?frequency?of?32.768?khz.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?21?of?24 table12.?maximum?number?of?display?digits?per?duty?cycle lcd?duty lcd?bias com?output?pins maximum?digit?display?8?segment?pins) static static com0 4 1/2 1/2 com0?com1 8 1/3 1/2 com0?com2 12 1/3 1/3 com0?com2 12 1/4 1/3 com0?com3 16 table?13.?lcd?mode?control?register?(lmod)?organization?(8-bit?w) lmod.7 lcd?voltage?dividing?register?control?bit 0 internal?voltage?dividing?resistor. 1 external?voltage?dividing?resistor;?internal?voltage?dividing?resistors?are?off. lmod.6 always?logic?zero lmod.5 lmod.4 lcd?clock?(lcdck)?frequency 0 0 fw/2 ?9 ?=?64?hz 0 1 fw/2 8 ?=?128?hz 1 0 fw/2 7 ?=?256?hz 1 1 fw/2 6 ?=?512?hz lmod.3 lmod.2 lmod.1 lmod.0 duty?and?bias?selection?for?lcd?display 0 x x x lcd?display?off 1 0 0 0 1/4?duty,?1/3?bias 1 0 0 1 1/3?duty,?1/3?bias 1 0 1 0 1/2?duty,?1/2?bias 1 0 1 1 1/3?duty,?1/2?bias 1 1 0 0 static note:'x'?means?'don't?care'. lcd?drive?voltage the?lcd?display?is?turned?on?only?when?the?voltage?difference?between?the?common?and?segment? signals?is greater?than?vlcd.?the?lcd?display?is?turned?off?when?the?difference?between?the?common?and?segment?signal voltages?is?less?than?vlcd. note:? the? lcd? panel? display? may? deteriorate? if? a? dc? voltage? is? applied? that? lies? between? the? common? and segment?signal?voltage.?therefore,?always?drive?the?lcd?panel?with?ac?voltage common?(com)?signals the?common?signal?output?pin?selection?(com?pin?selection)?varies?according?to?the?selected?duty?cycle.
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?22?of?24 table?14.?common?signal?pins?used?per?duty?cycle display?mode com0?pin com1?pin com2?pin com3?pin static selected n/c n/c n/c 1/2?duty selected selected n/c n/c 1/3?duty selected selected selected n/c 1/4?duty selected selected selected selected note:?nc?means?that?no?connection?is?required figure?13.?lcd?common?signal?waveform?(static) com0 v lc0 v ss t f =t t:?lcdck t f :??frame?frequency v lcd figure?14.?lcd?common?signal?waveforms?at?1/2?bias?(1/2,?1/3?duty) com0,1 (1/2?duty) com0,1 (1/3?duty) t f =2?x?t t f =3?x?t v lc0 v lc1,2 v ss v lc0 v lc1,2 v ss v lcd v lcd t:?lcdck t f =frame?frequency figure?15.?lcd?common?signal?waveforms?at?1/3?bias?(1/3,?1/4?duty) com0-2 (1/3?duty) com0-3 (1/4?duty) t f =?3?x?t v lc0 v lc1 v ss v lcd t:?lcdck t f =frame?frequency v lc2 v lc0 v lc1 v ss v lcd v lc2 t f =?4?x?t
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?23?of?24 segment?(seg)?signals the?40?lcd?segment?signal?pins?are?connected?to?corresponding?display?ram?locations?at?1e0h?1ffh.?bits 0?3?of?the?display?ram?are?synchronized?with?the?common?signal?output?pins?com0,?com1,?com2,?and?com3. figure?16.?select/no-select?bias?signals?in?static?display?mode select no-select v lc0 v ss v ss v lc0 t t com seg t?=?lcdck serial?i/o?interface using?the?serial?i/o?interface,?you?can?exchange?8-bit?data?with?an?external?device.?the?serial?interface?can?run off?an?internal?or?an?external?clock?source,?or?the?tol0?signal?that?is?generated?by?the?8-bit?timer/counter?0,?tc0. if?you?use?the?tol0?clock?signal,?you?can?modify?its?frequency?to?adjust?the?serial?data?transmission?rate. figure?17.?serial?i/o?interface?circuit?diagram internal?bus 8 sbuf?(8-bit) r ck q d clock selecor r s q internal?bus 8 smod.7 smod.6 smod.5 - smod.3 smod.2 smod.1 smod.0 bits* q0 q1 q2 3-bit?counter lsb?or?msb?first so overflow si irqs p4.0/sck tol0 cpu?clock f xx /2 4 clear *?instruction?execution
SC63C0316 hangzhou?silan?microelectronics?co.,ltd ?rev:1.0???????2004.08.03 http:?www.silan.com.cn???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????page?24?of?24 package?outline qfp-80-1420-0.8??????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????unit:?mm 1 4 . 0 0 . 2 1 7 . 9 0 . 4 0 . 8 0 . 2 1 2 . 0 1 6 . 3 0 . 4 handling?mos?devices: electrostatic?charges?can?exist?in?many?things.?all?of?our?mos?devices?are?internally?protected?against electrostatic?discharge?but?they?can?be?damaged?if?the?following?precautions?are?not?taken: persons?at?a?work?bench?should?be?earthed?via?a?wrist?strap. equipment?cases?should?be?earthed. all?tools?used?during?assembly,?including?soldering?tools?and?solder?baths,?must?be?earthed. mos?devices?should?be?packed?for?dispatch?in?antistatic/conductive?containers.

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